Power control

ABSTRACT

A method comprising: sensing an ambient temperature at an electronic apparatus; and switching between a first processing mode of the electronic apparatus and a second processing mode of the electronic device, in response to an increase in the ambient temperature above a threshold.

FIELD OF THE INVENTION

Embodiments of the present invention relate to power control. Inparticular, they relate to controlling power consumption by selectingone of a plurality of processing modes.

BACKGROUND TO THE INVENTION

There is currently very great interest in reducing power consumption inelectronic devices, particularly portable electronic devices. One sourceof power consumption is processing circuitry.

It is generally undesirable to have processing circuitry operating atfull speed and full power irrespective of processing load. It isgenerally desirable to match the processing power with the processingload so that less power is consumed.

One solution is dynamic voltage and frequency scaling (DVFS). Theprocessing circuitry is arranged so that it can operate at one of aplurality of different power consumption levels. Each power consumptionlevel has its own processing frequency and voltage. The powerconsumption level that has the lowest power consumption but is stillcapable of handling a processing load is chosen for use.

BRIEF DESCRIPTION OF THE INVENTION

According to some embodiments of the invention there is provided amethod comprising: sensing an ambient temperature at an electronicapparatus; and switching between a first processing mode of theelectronic apparatus and a second processing mode of the electronicdevice, in response to an increase in the ambient temperature above athreshold.

According to some embodiments of the invention there is provided amethod an apparatus comprising: an ambient temperature sensor forsensing ambient temperature; processing circuitry having a firstprocessing mode and a second, different, processing mode; and acontroller for selecting the processing mode of the processing circuitryin response to the sensed ambient temperature.

According to some embodiments of the invention there is provided acomputer program comprising computer program instructions which whenloaded into a processor enable the processor to control switching ofprocessing circuitry between a first processing mode and a second,different, processing mode, in response to an input indicating anambient temperature.

According to some embodiments of the invention there is provided amethod comprising: sensing an ambient temperature at an electronicapparatus; estimating total power consumption of a first processing modeof the electronic apparatus when processing a defined load at the sensedambient temperature; estimating total power consumption of a second,different, processing mode of the electronic apparatus when processingthe defined load at the sensed ambient temperature; and selecting theprocessing mode with the lowest estimated power consumption whenprocessing the defined load at the sensed ambient temperature

According to some embodiments of the invention there is provided amethod comprising: detecting a characteristic of processing circuitry;estimating total power consumption of a first processing mode of theprocessing circuitry, when processing a defined load, using the detectedcharacteristic; estimating total power consumption of a secondprocessing mode of the processing circuitry, when processing a definedload, using the detected characteristic ; and selecting the processingmode based on the estimated total power consumptions for the firstprocessing mode and the second processing mode.

The detected characteristic may be one that is related to leakagecurrent in the processing circuitry. A detected characteristic may bethe performance of the processing circuitry which is typically relatedto leakage current.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the present invention reference will nowbe made by way of example only to the accompanying drawings in which:

FIG. 1 schematically illustrates an apparatus comprising: an ambienttemperature sensor, processing circuitry and a controller;

FIG. 2A illustrates periodic clock signals for a plurality of firstprocessing modes;

FIG. 2B illustrates a clock signal for the second processing mode andalso its component fixed base clock signal and variable duty cycle;

FIGS. 3A and 3B illustrate how total power consumption T varies withtemperature and load;

FIGS. 3A and 3C illustrate how total power consumption T varies withtemperature and processing circuitry characteristics; and

FIG. 4 schematically illustrates a process for selecting between use ofa first processing mode and a second processing mode based on estimatesof their power consumption at an ambient temperature.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

Semiconductor devices may have different geometries e.g. 65/45/32 nm.

For a given geometry there are different process varieties such as lowpower (LP), general purpose (GP) or high performance (HP). Thesesemiconductor processes have different transistor threshold voltages(Vt). A low threshold voltage results in high performance and highleakage current for a given geometry and supply voltage. A higherthreshold voltage results in lower performance but also lower leakagecurrent for a given geometry and supply voltage. It is not normallypossible to have devices that have higher leakage and lower performanceor devices that have lower leakage and higher performance i.e. there istypically a strong correlation between performance and leakagecurrent—the higher the performance, the higher the leakage.

For a given semiconductor process, manufacturing variations may resultin variations in leakage current and performance, but there remains thesame strong correlation between performance and leakage current.

The inventors have realized that a measurement of the performance of asemiconductor circuit therefore indicates its leakage current which, asexplained, is dependent upon multiple variables some or all of which maybe unknown.

Implementations of the same design of processing circuitry may havedifferent leakage because different semiconductor processes have beenused.

Implementations of the same design of processing circuitry may havedifferent leakage even if the same semiconductor processes have beenused because of manufacturing variations or variations in the propertiesof the semiconductor used.

The power dissipated by leakage currents depends on the factorsdescribed in the preceding paragraphs and also has a strong dependenceon temperature.

FIG. 1 schematically illustrates an apparatus 10 comprising: an ambienttemperature sensor 6, processing circuitry 14 and a controller 2.

The apparatus is an electronic device. It may, for example, be ahand-portable electronic device such as a mobile cellular telephone, apersonal music player, an electronic book reader, a personal digitalassistant, a gaming device etc.

In this example, the controller 2 is provided by a computer comprising aprogrammable processor 2 and memory 8. The processor 2 is arranged toread from and write to the memory 8. The memory 8 stores a computerprogram 12, which when loaded in the processor 2 enables it to performthe functions of the controller. In other examples, the controller 2 maybe provided by dedicated hardware or firmware. It may for example, insome embodiments, be incorporated within the processing circuitry 14.

In this example, the ambient temperature sensor 6 is an analogue sensorsuch as a thermistor mounted on a printed wiring board (PWB). Ananalogue to digital converter (ADC) 4 is used to convert the analoguetemperature value to a digital temperature value which is then processedby controller 2. The PWB typically carries the temperature sensor 6, ADC4, processor 2, memory 8 and processing circuitry 14.

The processing circuitry 14 is typically an integrated circuit (IC). ICstypically comprise a semiconductor (e.g. silicon, germanium, galliumarsenide etc) substrate that has electronic circuits integrated on orwithin the semiconductor. One type of IC is the silicon CMOS IC.Embodiments of the invention find particular utility with ICs with 65 nmand below process geometries.

The processing circuitry 14, in one embodiment, comprises a programmablevoltage regulator 16 and adaptive voltage scaling (AVS) oscillator 18.The processing circuitry 14 may also comprise test circuitry 20.

The processing circuitry 14 may be dedicated to a particular purpose orpurposes. It may be an application specific integrated circuit (ASIC).

For example, the processing circuitry may be designed for decodingand/or encoding. It may, for example, be used to process a mobilecellular voice call and/or be used for music playback and/or be used forvideo playback.

The controller 2 is operable to select a processing mode for theprocessing circuitry 14. The selection depends upon the ambienttemperature and the processing load for the processing circuitry 14.Thus the processing mode may change when the sensed ambient temperaturechanges and/or the processing load changes.

The processing circuitry 14 has a series of first processing modes and asecond, different, processing mode.

Each of the plurality of first processing modes is a continuousprocessing mode that is suitable for processing a different load. Eachof the first processing modes is suitable for a different discreteprocessing load level. The first processing modes each have a differentperiodic clock signal 32 as illustrated in FIG. 2A and hence a differentpower consumption.

For each of the first processing modes, the processing clock signal 32provided by oscillator 18 is continuous on a macro-scale (i.e. there areno discontinuities in its periodicity) and has a different periodicclock rate on the micro-scale. That is the processing clock signals forthe first processing modes are regularly periodic.

The first processing modes may be implemented as a dynamic voltage andfrequency scaling (DVFS) mode as is known in the art. Each differentfirst processing mode may have a different voltage and operationalfrequency as indicated in the table below.

% Frequency Voltage Reference in FIG. 2A 100 1.2 32₁ 50 1.05 32₂ 25 0.932₃ 12.5 0.8 32₄

It will of course be appreciated that the higher the voltage/frequencythe higher the power consumption.

The second processing mode is a discontinuous processing mode with apower consumption that varies with the processing load.

The second processing mode is a discontinuous (intermittent) processingmode that is suitable for processing different loads. The secondprocessing mode has a different clock signal 38 as illustrated in FIG.2B that can be considered to be an AND combination of a fixed base clocksignal 34 and a variable duty cycle 36.

The duty cycle has ‘on’ portions 33 and ‘off’ portions 35. The ratio ofthe on/off portions is continuously variable under control of controller2. The second processing mode can operate with a plurality of differentduty cycles and hence different power consumptions. The duty cycle 33may be adjusted to match the processing load. As the processing loadreduces the duty cycle will remain off for longer periods which savespower.

During the ‘off’ portion 35, the apparatus 10 may be switched to a lowpower consumption mode in which, for example the power and clock areshut down completely during the periods 35. Thus, during the secondprocessing mode, the apparatus 10 operates in distinct bursts. Duringthe ‘off’ periods there is consequently no leakage current.

For the second processing mode, the processing clock signal 38 providedby oscillator 18 is discontinuous on a macro-scale (i.e. there arediscontinuities 39 in its periodicity) and has a constant fast periodicclock rate on the micro-scale. That is the processing clock signals forthe second processing mode are regularly periodic but only for discreteportions 37 separated by discontinuities 39.

The duration of the discrete portion 37 of regular periodicity and theduration of the discontinuities 39 are controlled by the duty cycle 36.

The regular periodicity is controlled by the base clock signal 34, whichin this example is equivalent to the clock signal 32 ₁.

The controller 2 uses a model for power consumption for the firstprocessing modes and for the second processing mode. This model takesaccount of the processing load, the ambient temperature and thecharacteristics of the processing circuitry 14 itself. The model, inparticular, evaluates the power consumption associated with leakagecurrent within the processing circuitry 14 as an apparatus specificvalue corrected for temperature.

The total power T consumed during a processing mode is dependent uponthe power consumed performing operations O(L) and the power consumed dueto inefficiencies W(L,T) including leakage currents.

The total power T is not a fixed constant but depends on load andtemperature and also factors associated with the processing circuitry 14such as the semiconductor used, the process used, the geometry used,manufacturing variations etc. The determination of what processing modeis most appropriate when therefore depends upon characteristics of theprocessing circuitry 14, the load and the temperature.

The power consumed by inefficiencies may be modeled as the powerdissipated by leakage current which has an exponential dependence ontemperature and dependency on performance. High performance silicon hashigh leakage and low performance silicon has low leakage.

First Processing Modes

For the first processing modes, let the maximum selectable voltage beVmax and let V(L) be the voltage that would be selected for a processingload L.

Referring back to the table above, Vmax is 1.2V and V(L)=1.2 for L>50%maximum load, V(L)=1.05 for 25% maximum load<L≦50% maximum load, V(L) is0.9 for 12.5% maximum load<L≦25% maximum load, V(L) is 0.8 for L≦12.5%maximum load.

k₁ is a load L dependent correction factor defined by:

k ₁(L)=V(L)/Vmax   Equation 1

The operational power is modeled as:

O(L)=O _(o)(L)*(k ₁(L))²   Equation 2

O_(o)(L) is the typical power for the load L and is read from a look-uptable in memory 8.

The leakage power is modeled as:

W(L,T)=X*I(T)*k ₁(L)^(m)   Equation 3

where X is a value representing device dependent power dissipation byleakage currents and I is a temperature dependent correction factor andm is typically 3 but may vary for different designs of processingcircuitry.

The value of X may be read from memory 8 having been previously storedthere during manufacturing and production testing or determined in-situ.For in-situ determination, an internal test circuit 20 is used tomeasure the inherent performance capability of the processing circuitry14. The test circuit 20 may, for example, measure the frequency of afree running oscillator or a delay in a delay line built fromcombinational logic components. The test circuitry need not be dedicatedcircuitry that is present only for testing but it could be circuitrythat is re-used for a different purpose, for example, the oscillator 18.

If X is the actual leakage power, X_(o) is the typical leakage power,f_(m) is the measured oscillator frequency and f_(o) is the typicaloscillator frequency then one expression for the leakage power is:

X=X _(o)*(f _(m) /f _(o))^(N)   Equation 4

where N is a real number such as, for example, 2.

The temperature dependent correction factor I is given by:

I=I _(o)*(1+c)^(T−To)   Equation 5

where I is the leakage current at temperature T, I_(o) is the leakagecurrent at temperature T_(o), and c is a coefficient e.g. c maytypically be about 0.03. The coefficient c is dependent upon the type ofsilicon process used in the processing circuitry and its geometry(65/45/32 nm).

The total power for the first modes is therefore given by:

T=O(L)+W(L, T)=>T=O _(o) *k ₁ ² +X*I*k ₁ ³   Equation 6

The load dependent parameters are O_(o) and k₁ and the temperaturedependent parameter is I.

Second Processing Modes

For the second processing mode, let's define k₂ as a load L dependentcorrection factor that is proportional to the duty cycle Γ36.

k ₂(L)=Γ  Equation 7

The operational power is modeled as:

O(L)=O _(o)(L)*(k ₂(L))   Equation 8

where O_(o)(L) is the typical power for the load L read from a look-uptable in memory 8.

The leakage power is modeled as:

W(L,T)=X*I(T)*k ₂(L)   Equation 9

and the total power for the second mode is therefore given by:

T=O _(o) *k ₂ +X*I*k ₂   Equation 10

The load dependent parameters are O_(o) and k₂ and the temperaturedependent parameter is I.

FIGS. 3A and 3B illustrate how total power consumption T varies withtemperature and load.

The trace 40 _(A) in FIG. 3A illustrates how the total power T, for thefirst processing mode, varies with temperature when the processing loadis A.

The trace 40 _(B) in FIG. 3B illustrates how the total power T, for thefirst processing load, varies with temperature when the processing loadis B. In the illustrated example, the increase in processing load fromload A to load B is sufficient to discretely increase V(L) to the nextlevel (next first processing mode) and hence produce a step-change inK₁(L). This results in a discrete jump in the total power T betweenFIGS. 3A and 3B for the first processing modes.

The trace 42 _(A) in FIG. 3A illustrates how the total power T, for thesecond processing mode, varies with temperature when the processing loadis A. The trace 42 _(B) in FIG. 3B illustrates how the total power T,for the second processing load, varies with temperature when theprocessing load is B. In the illustrated example, the increase inprocessing load from load A to load B causes a linear increase in theduty cycle D and hence a linear increase in k₂. This results in a smallincrease in the total power T between FIGS. 3A and 3B for the secondprocessing mode.

It will be appreciated that in FIG. 3A, there is a temperature thresholdvalue T_(T) where the traces 40 _(A) and 42 _(A) cross. At temperaturesbelow the threshold value 48 _(A), the first mode is more powerefficient than the second processing mode and will be used in thetemperatures range 44 _(A). At temperatures above the threshold value,the second mode is more power efficient than the first processing modeand will be used in the temperatures range 46 _(A).

In FIG. 3B, there is a temperature threshold value T_(T) where thetraces 40 _(B) and 42 _(B) cross. This threshold is different to that inFIG. 3A as it is load dependent. At temperatures below the thresholdvalue 48 _(B), the first mode is more power efficient than the secondprocessing mode and will be used in the temperatures range 44 _(B). Attemperatures above the threshold value, the second mode is more powerefficient than the first processing mode and will be used in thetemperatures range 46 _(B).

The traces in FIGS. 3A and 3B are also dependent upon factors associatedwith the processing circuitry 14 such as the semiconductor used, theprocess used, the geometry used, manufacturing variations etc. Thisdependency is illustrated in a comparison of FIGS. 3A and 3C.

FIG. 3A illustrates how the total power consumption for the firstprocessing mode and second processing mode varies with temperature whenfirst processing circuitry, which has been manufactured according to afirst silicon process, processes load A. FIG. 3C illustrates how thetotal power consumption for the first processing mode and secondprocessing mode varies with temperature. The second processing circuitryhas been manufactured according to the same design as the firstprocessing circuitry and processes the same load A. However the secondprocessing circuitry has been manufactured according to the firstsilicon process, but with a manufacturing variation, or has beenmanufactured according to a second different silicon process. Thesilicon manufactured according to the first process (FIG. 3A) is higherperformance than that of the second processing circuitry (FIG. 3B). Thehigher performance silicon has higher leakage and greater powerconsumption and a lower threshold temperature.

The controller 2 dynamically selects the most power efficient processingmode. The controller 2 controls switching from the second processingmode to the first processing mode, in response to a decrease in theambient temperature below the dynamic threshold. The controller 2controls switching from the first processing mode to the secondprocessing mode, in response to an increase in the ambient temperatureabove the dynamic threshold.

An example of a process 50 that is performed by controller 2 isschematically illustrated in FIG. 4. In the process 50, a series ofinterconnected blocks are illustrated. The blocks may be considered assteps in a method or code portions in a computer program 12.

At block 52, in loop 59, a test is performed to determine if theprocessing load has changed. If the load has not changed the processmoves to block 58. If the processing load has changed then loop 59 isinterrupted and block 54 is entered.

At block 54, it is determined which one of the first processing modesthat is capable of handling the processing load has the lowest powerconsumption and this first processing mode is set as a putative firstprocessing mode. The load dependent correction factor k₁(L) is thencalculated according to Equation 1. The minimum duty cycle required forthe second processing mode to handle the processing load is alsodetermined defining a putative second processing mode and the loaddependent correction factor k₂(L) is then calculated according toEquation 7.

The processes then moves to perform blocks 56 and 62 in parallel.

At block 58, a test is performed to determine if the temperature haschanged or changed by a predetermined value. If the temperature has notchanged the process returns to block 52 via loop 59. If the temperaturehas changed then loop 59 is interrupted and block 60 is entered.

At block 60, the temperature dependent correction factor I is determinedaccording to Equation 5 using the newly sensed temperature. The processthen moves to block 62.

At block 62, the power W dissipated by the leakage current for theputative first mode is estimated using Equation 3 and for the putativesecond mode using Equation 9.

At block 56, the operational power O is calculated for the putativefirst processing mode according to Equation 2 and for the putativesecond processing mode according to Equation 8.

Then at block 64, he power W dissipated by the leakage current for theputative first mode and the operational power O for the putative firstmode are combined to estimate the total power T for the first modeaccording to Equation 6. The power W dissipated by the leakage currentfor the putative second mode and the operational power O for theputative second mode are combined to estimate the total power T for thesecond mode according to Equation 10.

Then at block 66, one of the putative first processing mode and theputative second processing mode is selected. If the total power T forthe first mode is greater than the total power T for the second modethen the second mode is selected. If the total power T for the secondmode is greater than the total power T for the first mode then the firstmode is selected.

After block 66 the process returns to loop 59.

Referring back to FIG. 1, the memory 8 stores computer programinstructions 12 that control the operation of the apparatus 10 whenloaded into the processor 2. The computer program instructions 12provide the logic and routines that enables the electronic device toperform the methods illustrated in FIG. 4.

The computer program instructions, when loaded into the processor 2,enable the processor 2 to control switching of processing circuitry 14between a first processing mode and a second, different, processingmode, in response to an input indicating an ambient temperature.

The computer program instructions may arrive at the apparatus 10 via anelectromagnetic carrier signal or be copied from a physical entity 22such as a computer program product, a memory device or a record mediumsuch as a CD-ROM or DVD.

Although embodiments of the present invention have been described in thepreceding paragraphs with reference to various examples, it should beappreciated that modifications to the examples given can be made withoutdeparting from the scope of the invention as claimed.

Whilst endeavoring in the foregoing specification to draw attention tothose features of the invention believed to be of particular importanceit should be understood that the Applicant claims protection in respectof any patentable feature or combination of features hereinbeforereferred to and/or shown in the drawings whether or not particularemphasis has been placed thereon.

1. A method comprising: sensing an ambient temperature at an electronicapparatus; and switching between a first processing mode of saidelectronic apparatus and a second processing mode of said electronicapparatus, said method further comprising: a) estimating total powerconsumption of the first processing mode when processing a defined loadat a sensed ambient temperature; b) estimating total power consumptionof the second processing mode when processing the defined load at thesensed ambient temperature; and c) selecting the processing mode withthe lowest estimated power consumption when processing the defined loadat the sensed ambient temperature. 2-41. (canceled)
 42. A method asclaimed in claim 1, wherein the estimated total power consumption in thefirst processing mode is temperature dependent and estimated total powerconsumption in the second processing mode is separately temperaturedependent.
 43. A method as claimed in claim 1, further comprisingrepeating steps a), b) and c) when the sensed ambient temperaturechanges.
 44. A method as claimed in claim 1, wherein the selection isdependent upon the sensed ambient temperature.
 45. A method as claimedin claim 1, further comprising repeating steps a), b) and c) when thedefined load changes.
 46. A method as claimed claim 1, wherein theselection is dependent upon the defined load.
 47. A method as claimed inclaim 1, further comprising modeling a leakage current within theelectronic apparatus and using said model to estimate the powerdissipated by the leakage current.
 48. A method as claimed in claim 47,wherein the power dissipated by the leakage current is a device specificvalue corrected for temperature.
 49. A method as claimed in claim 1,further comprising: detecting a characteristic of processing circuitry;estimating total power consumption of a first processing mode of theprocessing circuitry, when processing a defined load, using the detectedcharacteristic; estimating total power consumption of a secondprocessing mode of the processing circuitry, when processing a definedload, using the detected characteristic ; and selecting the processingmode based on the estimated total power consumptions for the firstprocessing mode and the second processing mode.
 50. An apparatuscomprising: an ambient temperature sensor for sensing ambienttemperature; processing circuitry having a first processing mode and asecond, different, processing mode; and a controller for selecting theprocessing mode of the processing circuitry in response to the sensedambient temperature wherein the controller is operable to: a) estimatetotal power consumption of the first processing mode when processing adefined load at a sensed ambient temperature; b) estimate total powerconsumption of the second processing mode when processing the definedload at the sensed ambient temperature; and c) select the processingmode with the lowest estimated power consumption when processing thedefined load at the sensed ambient temperature.
 51. An apparatus asclaimed in claim 50, wherein the controller is operable to select aprocessing mode when the sensed ambient temperature changes.
 52. Anapparatus as claimed in 50, wherein the controller is operable to selecta processing mode when the defined load changes.
 53. An apparatus asclaimed in claim 52, wherein the controller is operable to use a modelof a leakage current within the processing circuitry to estimate thepower dissipated by the leakage current.
 54. An apparatus as claimed inclaim 53, wherein the power dissipated by the leakage current is adevice specific value corrected for temperature.
 55. An apparatus asclaimed in claim 50, wherein the first processing mode is a continuousprocessing mode.
 56. An apparatus as claimed in claim 50, wherein thefirst processing mode is one of a plurality of selectable modes eachmode having a different clock rate.
 57. An apparatus as claimed in claim50, wherein the second processing mode is a discontinuous processingmode.
 58. An apparatus as claimed in claim 50, wherein the firstprocessing mode is one of a plurality of selectable modes each modehaving a different duty cycle.
 59. A method comprising: detecting acharacteristic of processing circuitry; estimating total powerconsumption of a first processing mode of the processing circuitry, whenprocessing a defined load, using the detected characteristic; estimatingtotal power consumption of a second processing mode of the processingcircuitry, when processing a defined load, using the detectedcharacteristic ; and selecting the processing mode based on theestimated total power consumptions for the first processing mode and thesecond processing mode.